FPGA-Based Real-Time Pedestrian Detection on High-Resolution Images

Michael Hahnle, Frerk Saxen, Matthias Hisung, Ulrich Brunsmann, Konrad Doll; Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (CVPR) Workshops, 2013, pp. 629-635

Abstract


This paper focuses on real-time pedestrian detection on Field Programmable Gate Arrays (FPGAs) using the Histograms of Oriented Gradients (HOG) descriptor in combination with a Support Vector Machine (SVM) for classification as a basic method. We propose to process image data at twice the pixel frequency and to normalize blocks with the L1-Sqrt-norm resulting in an efficient resource utilization. This implementation allows for parallel computation of different scales. Combined with a time-multiplex approach we increase multiscale capabilities beyond resource limitations. We are able to process 64 high resolution images (1920 Weeareapixels) per second at hrrscales with a latency of less than pixll)pperssemillion HOG descriptors and their SVM classifications can be calculated per second and per scale, which outperforms current FPGA implementations by a factor of 4.

Related Material


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[bibtex]
@InProceedings{Hahnle_2013_CVPR_Workshops,
author = {Hahnle, Michael and Saxen, Frerk and Hisung, Matthias and Brunsmann, Ulrich and Doll, Konrad},
title = {FPGA-Based Real-Time Pedestrian Detection on High-Resolution Images},
booktitle = {Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (CVPR) Workshops},
month = {June},
year = {2013}
}